The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2004
Filed:
Mar. 13, 2002
Tim Alton, San Jose, CA (US);
Wai-Kong Chen, Fremont, CA (US);
Michael Davis, San Jose, CA (US);
Warren Necoechea, Fremont, CA (US);
LTX Corporation, Westwood, MA (US);
Abstract
A phase-locked loop circuit having a programmable tuning voltage. As the input reference clock frequency is changed, the tuning voltage is changed accordingly to compensate for the propagation delay through the phase detector and thereby reduce discrepancies in the phase relationship between the input reference clock signal and the output clock signal at different frequencies. A set of compensation values corresponding to input reference clock frequencies are stored in a memory device. When the input reference clock frequency is changed, a corresponding compensation value is programmed to a digital-to-analog converter (DAC). The DAC outputs a voltage that is proportional to the value of the digital input to the DAC and can thus be used to regulate the tuning voltage of the PLL circuit so that the relationship of the input reference clock signal to the output clock signal remains stable with frequency changes.