The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2004
Filed:
Nov. 06, 2000
Hessam Mohajeri, Los Altos Hills, CA (US);
Centillium Communications, Inc., Fremont, CA (US);
Abstract
An apparatus and method to implement a highly efficient low power line driver. In a first embodiment, the invention provides a method to increase the power efficiency of a line driver. The method includes supplying a digital signal processor output to a first subtractor; supplying the first subtractor output as an input to a modulator of a line driver; subtracting the line driver output from the digital signal processor output at the first subtractor; filtering the line driver output with a low pass filter; routing the line driver output to an impedance match filter; providing a first analog-to-digital converter and a second subtractor to subtract the line impedance match filter output from the low pass filter output; providing a digital filter and a second analog-to-digital converter; and subtracting the digital filter output from the first analog-to-digital converter output at a third subtractor to output a feedback signal to the digital signal processor. In a second embodiment, the invention provides an ADSL system with a line driver. The system line driver includes a first subtractor; a digital signal processor to supply a signal to the first subtractor; a line driver receiving an input from the first subtractor, wherein a first closed loop path is provided from the line driver output to the first subtractor; a line impedance match filter receiving the line driver output as an input; a low pass filter, receiving the line driver output as an input; a second subtractor circuit to subtract the line impedance match filter output from the low pass filter output, wherein the second subtractor provides an input to a first analog-to-digital converter; a second analog-to-digital converter; a digital filter to receive an input from the second analog-to-digital converter; and a third subtractor to subtract the digital filter output from the first analog-to-digital converter output, wherein the third subtractor produces a feedback input signal to the digital signal processor.