The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2004
Filed:
Jan. 15, 2002
Kei-Kang Hung, Changhua Hsien, TW;
Chien-Hui Chuang, Taipei Hsien, TW;
Faraday Technology Corp., Hsinchu, TW;
Abstract
A power-rail ESD (electrostatic discharge) protection circuit with a dual trigger design is proposed, which is coupled between a first power line and a second power line connected to an IC device for protecting the IC device against ESD on the first power line and the second power line. The proposed power-rail ESD protection circuit comprises a control circuit and at least one MOS device. The control circuit is coupled between the first power line and the second power line, and which is capable of, in the event of ESD in the first power line and the second power line, being triggered by the ESD to output a substrate-triggering voltage and a gate-driving voltage to the MOS device, causing the MOS device to bypass the ESD current from the first power line and the second power line. The circuit configuration of the proposed power-rail ESD protection circuit can help reduce the junction breakdown voltage in a MOS device and increase in ESD robustness.