The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6727842 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 27, 2004

Filed:

Mar. 11, 2003
Applicant:
Inventors:

William Edward Schleder, Dublin, OH (US);

Michael Patrick Fink, Westerville, OH (US);

Phillip Hoseog Yu, Lewis Center, OH (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01S 1/300 ; G01S 1/308 ;
U.S. Cl.
CPC ...
G01S 1/300 ; G01S 1/308 ;
Abstract

Apparatus for processing a signal of a predetermined intermediate frequency (IF) to generate in-phase (I) and quadrature (Q) components thereof comprises: an analog-to digital converter circuit for sampling and digitizing the IF signal to generate digitized data samples thereof at a sampling rate that produces consecutive digitized data samples that are separated in phase by a substantially fixed phase angle 2&pgr;/n, where n is an integer greater than zero; first digital circuitry coupled to the analog-to digital converter circuit for demodulating the digitized data samples by multiplying every n consecutive digitized data samples with n respectively corresponding digital reference samples; and second digital circuitry coupled to the first digital circuitry for combining selected ones of the demodulated samples based on the substantially fixed phase angle to generate digital data samples of the I and Q components of the IF signal. The apparatus may include third digital circuitry coupled to the second circuitry for generating digital data samples of a log video component of the IF signal from the digital data samples of the I and Q components. The first, second and third digital circuitry may be programmed into a gate array integrated circuit.


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