The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2004
Filed:
Dec. 29, 1999
Hyun Lee, Allentown, PA (US);
David W. Potter, Allentown, PA (US);
Lai Q. Pham, Center Valley, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
The present invention is a method and apparatus for dynamically holding valid data logic levels on a bus by taking advantage of the inherent storage capacity of the bus. The bus speed is increased by eliminating the use of active bus keepers and null cycles. Instead, a two phase clock is used, the bus drivers drive data onto the bus during the first phase of the clock and are turned off at the beginning of the second phase of the bus clock. The receiving device latches the data during the second phase of the bus clock. Accordingly, there is no need for a null cycle or a bus keeper circuit, yet there is no bus contention between consecutive drivers nor is there a floating node condition.