The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2004
Filed:
Aug. 09, 2002
James W. Miller, Austin, TX (US);
Geoffrey B. Hall, Austin, TX (US);
Alexander Krasin, Moscow, RU;
Michael Stockinger, Austin, TX (US);
Matthew D Akers, Austin, TX (US);
Vishnu G. Kamat, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
An Electrostatic Discharge (ESD) protection circuit ( ) includes a plurality of I/O and power supply pad cells ( ) that comprise external pads ( ) and circuitry requiring ESD protection. The protection circuit includes an array of shunting devices ( ) coupled in parallel between an ESD bus ( ) and a VSS bus ( ) and distributed among the plurality of pad cells. One or more trigger circuits ( ) control the shunting devices. ESD events are coupled from any stressed pad onto two separate buses: the ESD bus which routes the high ESD currents to the positive current electrodes of the multiple shunting devices, and a Boost bus ( ) which controls the trigger circuits. During an ESD event, the trigger circuits drive the control electrodes of the shunting devices to a voltage level greater than possible with prior art circuits, thereby reducing the on-resistance of the shunting devices.