The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2004
Filed:
Jun. 25, 2002
Hyung Soon Park, Kyoungki-do, KR;
Jong Goo Jung, Kyoungki-do, KR;
Hynix Semiconductor Inc., Kyoungki-Do, KR;
Abstract
The present invention discloses methods for fabricating a semiconductor device. In one embodiment, a conductive interconnection is formed on a semiconductor substrate to overlap with a mask insulating film pattern. An insulating film spacer is formed at side walls of the pattern, a high temperature oxide layer is formed on the resultant structure, and an interlayer insulating film is formed on the HTO film to planarize the surface of the resultant structure. Storage electrode and bit line contact holes are formed to expose the semiconductor substrate, by etching the interlayer insulating film according to a photolithography process using a contact mask. A landing plug poly is formed by depositing a conductive layer for a contact plug to fill up the contact holes. A first CMP process for etching the conductive layer and the interlayer insulating film by a predetermined thickness is performed using a basic slurry, and a second CMP process of polishing the conductive layer for a contact plug and the interlayer insulating film by using a acid slurry is performed to expose the upper portion of the mask insulating film pattern, thereby forming the contact plug.