The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2004

Filed:

Oct. 29, 2001
Applicant:
Inventor:

Yoshiro Iwasa, Hino, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ; G06F 9/45 ; G06F 9/455 ;
U.S. Cl.
CPC ...
G06F 1/750 ; G06F 9/45 ; G06F 9/455 ;
Abstract

A semiconductor device and an input/output (I/O) cell placement method can cope with reduction of the chip area and increase in the number of pins, without changing a core transistor region inside the semiconductor device. A semiconductor chip of the semiconductor device has a core transistor region, an I/O cell placement region and a pad placement region. At least two columns of I/O cells to be placed in the I/O cell placement region of the semiconductor chip are arranged in a direction perpendicular to the arranging direction of pads arranged along the outer peripheral portion of the semiconductor chip and in such a manner that the longitudinal direction (height directions) of the chip is parallel to the pad arranging direction.


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