Semiconductor integrated circuit device including circuit block having hierarchical structure and method of designing the same

Abstract

A semiconductor integrated circuit device of low power consumption having a hierarchical structure is obtained. This semiconductor integrated circuit device employs at least one gated clock selected from a group including at least three gated clocks consisting of at least two gated clocks generated by employing at least two operation control signals output to different hierarchies as gate signals and a prescribed gated clock input in a circuit block of the most significant hierarchy as a gated clock input in circuit blocks of lower hierarchies below a third hierarchy among the plurality of circuit blocks. Thus, a plurality of gated clocks for reducing power consumption are readily mechanically decided. When at least one gated clock satisfying a prescribed circuit constraint is selected from the plurality of gated clocks, a semiconductor integrated circuit device of low power consumption is readily obtained.