The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2004

Filed:

Oct. 17, 2002
Applicant:
Inventors:

Kosei Tamiya, Sagamihara, JP;

Tetsuji Ueyama, Hachioji, JP;

Masashi Saito, Akishima, JP;

Assignee:

Olympus Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 ;
U.S. Cl.
CPC ...
H03L 5/00 ;
Abstract

A variable resistance circuit and application circuits using the same capable of offsetting the variance in the manufacture of integrated circuit and the influence of ambient temperatures, including: a control circuit having a plurality of constant-current output terminals, with a constant current ratio of the output terminals varied by signals applied to a control terminal; an operational amplifier; a resistor; and a plurality of MOS transistors having the gates thereof connected in common; and one output terminal of the control circuit being connected to one end of the resistor and to an inverted input terminal of the operational amplifier and the other output terminal being connected to the drain of one MOS transistor connected at the gate thereof to an output terminal of the operational amplifier and being connected to a non-inverted input terminal of the operational amplifier; and the other end of said resistor and the source of said one MOS transistor being connected to a reference voltage terminal. Said one MOS transistor is caused to operate in the triode region so as to use as an equivalent resistance the portion between the source and drain of the other MOS transistor connected at the gate thereof to the output terminal of the operational amplifier and at the source thereof directly or through a voltage copy circuit to the reference voltage terminal.


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