The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2004
Filed:
May. 23, 2002
Toshimasa Mitsumori, Moriguchi, JP;
Takuya Sayama, Kusatsu, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
Pin setting data for defining initial states of external pins of a programmable logic device (PLD) is transferred to the PLD to set all the external pins before logic setting data for the PLD is transferred from memory, thereby preventing an unstable state of the PLD from propagating to logic circuits adjacent to the PLD. The logic setting data is divided into minimum logic setting data for defining functions required for a stable operation of a system and full logic setting data for defining all functions of the PLD, including functions other than the functions required for a stable operation of the system, and the former is transferred before the latter to reduce a period in which the PLD is unstable during the startup of the system, thereby avoiding instability during the system startup when the PLD is incorporated into an existing system.