The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2004

Filed:

Feb. 26, 2001
Applicant:
Inventors:

Shinichi Suzuki, Kyoto, JP;

Nobuaki Suzuki, Kyoto, JP;

Masashi Sano, Kyoto, JP;

Assignee:

Rohm Co., Ltd., Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/352 ;
Abstract

The semiconductor device (A) comprises a semiconductor chip ( ), a protective package ( ) covering the semiconductor chip ( ), a first lead ( ), and a second lead ( ). The semiconductor chip ( ) is placed at an inner end ( ) of the first lead ( ). Further, the semiconductor chip ( ) is connected to an inner end ( ) of the second lead ( ) via a wire (W). The first lead ( ) includes an outer portion ( ) extending out of the protective package ( ) whereas the second lead ( ) includes an outer portion ( ) extending out of the protective package ( ). These two outer portions ( ) are flat.


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Suzuki, Shinichi. (2004). Mounting structure for semiconductor device having entirely flat leads (U.S. Patent No. 6717256). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6717256

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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