The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2004
Filed:
Jun. 24, 2003
Noh Yeal Kwak, Ichon-Shi, KR;
Hong Seon Yang, Yongin-Shi, KR;
Hynix Semiconductor Inc., Ichon-Shi, KR;
Abstract
Disclosed is a method of manufacturing a semiconductor memory device. An ion implantation layer is formed into a given depth of the semiconductor substrate. Therefore, it is possible to prevent the dopant (P31) gettered on the surface of the semiconductor substrate from being diffused toward the bottom when a well ion is injected. The dopant (P31) gettered on the surface of the semiconductor substrate is easily experienced by transit-enhanced diffusion even at low temperature. Also, the dopant may serve as counter dopping in the buried channel. In the present invention, as the behavior of this dopant (P31) is prohibited in a subsequent annealing process, the concentration of the ion for controlling the threshold voltage could be uniformly kept. Therefore, the present invention can manufacture devices of high reliability having a stable threshold voltage characteristic and can be flexibly applied to manufacturing the devices depending on reduction in the design rule.