The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2004

Filed:

Jun. 03, 2002
Applicant:
Inventors:

Manfred Engelhardt, Feldkirchen-Westerham, DE;

Volker Weinrich, Paris, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 7/06 ;
U.S. Cl.
CPC ...
H01G 7/06 ;
Abstract

A method for fabricating a contact hole for a semiconductor memory element. The memory element includes a silicon substrate, an intermediate dielectric layer on the substrate, and an upper layer on the intermediate dielectric layer. The method includes forming a perforated mask on the upper layer, the mask including a material that exhibits temperature stability. The upper layer and a depression are etched into the intermediate dielectric layer as far as a residual thickness using the perforated mask. A layer including O /TEOS-SiO is deposited onto a structure thus obtained. The layer including O /TEOS-SiO is removed from a bottom of the depression by etching. The depression is lowered by etching to produce the contact hole as far as an interface with the silicon substrate, the silicon substrate being uncovered, and the layer including O /TEOS-SiO serving as a lateral seal of the upper layer during the lowering of the depression.


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