The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2004
Filed:
Jul. 10, 1998
Wei-Mun Chu, San Jose, CA (US);
Sudhakar R. Gouravaram, Fremont, CA (US);
Son Nguyen, San Jose, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A cell for inclusion in a cell library used in designing integrated circuits. The cell includes a signal processing circuit and a buffer circuit for buffering a signal external to an integrated circuit in which the cell is to be included. The cell also includes layout information for specifying a layout of an interconnecting trace between the signal processing circuit and the buffer circuit. The invention is also directed to a method for performing layout and routing during design of an integrated circuit, in which cells are obtained from a cell library, the obtained cells are laid out on an integrated circuit die, interconnections are routed between the cells. According to this aspect of the invention, one of the cells obtained from the cell library, referred to as a combined cell, includes (1) a signal processing circuit; (2) a buffer circuit for buffering a signal external to the integrated circuit in which the combined cell is to be included; and (3) layout information for specifying a layout of an interconnecting trace between the signal processing circuit and the buffer circuit.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile