The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2004
Filed:
Jul. 29, 2002
Eric C. Sung, Palm Bay, FL (US);
Kantilal Bacrania, Palm Bay, FL (US);
Hsin-Shu Chen, Melbourne, FL (US);
J. Mikko Hakkarainen, Palm Beach Gardens, FL (US);
Bang-Sup Song, La Jolla, CA (US);
Brian L. Allen, West Melbourne, FL (US);
Mario Sanchez, Palm Bay, FL (US);
Other;
Abstract
A compensation system for calibrating an amplifier having a compensation input including a sigma delta converter, a counter, a memory, adjust logic, a DAC, a pair of compensation capacitors, and a pair of current to voltage (I/V) converters. The converter converts an offset voltage to a bit stream. The counter stores a sum value indicative of the output offset. The memory stores a digital bias value. The adjust logic determines an adjust value based on the sum value and adjusts the stored digital bias value based on the adjust value. The DAC converts the digital bias value to a differential bias current. The compensation capacitors apply a compensation voltage to a compensation input of the amplifier. The I/V converters charge the compensation capacitors using the differential bias current. The adjust logic may use upper and lower thresholds and adjust the digital bias value by one LSB for each compensation cycle.