The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2004

Filed:

Aug. 22, 2002
Applicant:
Inventors:

Sumie Hirai, Inagi, JP;

Jun Ohmori, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawazaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K 3/10 ;
U.S. Cl.
CPC ...
H01K 3/10 ;
Abstract

A printed wired board is provided, in which an area for extracting liens for plating of the printed wired board is made small and at the same time the number of the extracting lines for plating within a packaging area is made small, resulting in an improvement of wiring efficiency. The circuit pattern formed on an insulating film has window portion and is not formed toward the periphery of the insulating film, and a bonding pad is electroplated, where the bonding pads are to be connected with a center-pad of a semiconductor by a bonding wire through the window portion. Accordingly, even when the shrinkage of semiconductor packages or narrow ball pitch is forwarded, the degree of freedom of drawing of circuit pattern in the printed wired board can be made large.


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