Method for transfering data between two different clock domains by calculating which pulses of the faster clock domain should be skipped substantially simultaneously with the transfer

Abstract

A method and related system for transferring data between systems having different clock domains. A skip signal generation circuit calculates substantially simultaneously with the transfer of data which signals of the faster clock domain should be skipped to ensure proper operation. The skip signal generation circuit makes this determination using values representing the faster and slower frequencies of each clock domain. These values are obtained either from preset values integrated in some form onto the microprocessor substrate, or may be written to the microprocessor by external circuitry and software. The skip signal generation circuit is capable of calculating skip patterns for any ratio of faster to slower frequency and is not constrained to have integer or half-integer ratios of the faster and slower clock domains.