The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2004

Filed:

Apr. 18, 2001
Applicant:
Inventors:

Tomoki Sekiguchi, Yokohama, JP;

Toshiaki Arai, Machida, JP;

Shigenori Kaneko, Hitachinaka, JP;

Hiroshi Ohno, Hitachi, JP;

Taro Inoue, Yamato, JP;

Takashi Shibata, Fujisawa, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/700 ;
U.S. Cl.
CPC ...
G06F 1/700 ;
Abstract

A computer system of a multi-operation-system (multi-OS) has a main memory having a memory area for a first OS and a memory area for a second OS, both the areas being independent from each other, and a plurality of I/O devices divisionally allocated to the first OS and the second OS. The first OS is loaded in the first OS memory area, and thereafter when the first OS is operated, the second OS is loaded in the second OS memory area and initialized. When the first OS is operated, the first OS hardware resources and the second OS hardware resources are registered by the first OS. Thereafter when the first OS is operated, the first OS inhibits the registration of an interrupt number already allocated to the second OS I/O device. In response to an interrupt request from a second OS I/O device, the second OS starts operating.


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