Arrayable, scaleable, and stackable molded package configuration

Abstract

A stacked molded package comprising a semiconductor package attached to an electronic device. The semiconductor package includes a semiconductor die which is connected to a set of wire leads and is encapsulated within a protective molding material. Additionally, solder bumps within the molding material are attached to input and output contact points on the semiconductor die. Portions of the solder bumps are exposed through the surface of the molding material so that contact can be made with the electrical contacts of an electronic device to be stacked upon the semiconductor package. The electronic device may be, for example, another semiconductor die or an opto-electronic transceiver. The present invention also includes a method for manufacturing the stacked molded package. The method involves forming the semiconductor package within a molding chamber which is injected with the protective molding material. The method further involves lowering the top surface of the molding chamber onto the solder bumps of the semiconductor package. The contact between the top surface of the molding chamber and the solder bumps flattens a portion of the solder bumps and prevents the flattened portion from being covered with molding material. Manufacturing the semiconductor package may be performed with the current manufacturing infrastructure which is used to make semiconductor packages according to specific form factors. A stacked package is formed when an electronic device is attached to the molded package.