The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 2004
Filed:
Feb. 24, 2000
Applicant:
Inventors:
Takeshi Nishida, Tokyo, JP;
Yoshio Inoue, Tokyo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/45 ;
U.S. Cl.
CPC ...
G06F 9/45 ;
Abstract
A method for optimizing placement and routing includes producing a net list constituting circuit connection information in a hardware description language, executing logic synthesis of the net list to output a gate-level net list with optimized logic, determining clusterings based on logic gap information used for optimizing the logic, outputting clustering information expressing a particular determination, and executing placement and routing based on the gate-level net list and the clustering information.