The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 2004
Filed:
Dec. 28, 2001
Applicant:
Inventor:
Xiao-Dong Yang, Sunnyvale, CA (US);
Assignee:
Sun Microsystems, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/710 ;
U.S. Cl.
CPC ...
G06F 1/710 ;
Abstract
A circuit reduction method that generates a netlist that maintains a topology of an original circuit while preserving an original circuit's functions and characteristics is provided. Further, a circuit reduction method that allows a user to selectively determine which nodes of an original circuit to reduce is provided. Further, a circuit reduction tool that is capable of removing loops that are not present in an original circuit but are present in an extraction of the original circuit is provided.
Quick Actions:
Yang, Xiao-Dong. (2004). Rc netlist reduction for timing and noise analysis (U.S. Patent No. 6704911). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6704911
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