The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2004

Filed:

Dec. 21, 2000
Applicant:
Inventor:

Cecil James Aswell, Orangevale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/900 ; H03F 3/04 ; H03G 3/30 ;
U.S. Cl.
CPC ...
H01L 2/900 ; H03F 3/04 ; H03G 3/30 ;
Abstract

A method and apparatus is disclosed for providing highly linear resistance with high sheet values, and for implementing resistors in a conventional CMOS process when either drain or source must operate near the rail of a circuit. Accordingly, a five terminal distributed MOS resistor device includes a drain terminal, a source terminal, and a channel region disposed between the drain terminal and the source terminal. A bulk terminal is adjacent the channel region. A first gate terminal is adjacent the source terminal and a second gate terminal is adjacent the drain terminal. Lastly, a gate region of resistive material is disposed between the first gate terminal and the second gate terminal, wherein upon application of a voltage to the first gate terminal and the second gate terminal, a voltage drop across the gate region is equally distributed along a length of an electrical channel in the channel region.


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