The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2004
Filed:
Oct. 01, 1999
Vijaya Pratap Adusumilli, San Jose, CA (US);
Bernard Ramanadin, San Jose, CA (US);
Atsushi Hasegawa, Sunnyvale, CA (US);
Shinichi Yoshioka, San Jose, CA (US);
Takanobu Naruse, Santa Clara, CA (US);
Hitachi, Ltd., Tokyo, JP;
Abstract
A computer system having a simple handshake protocol for implementing DMA transfers. A system bus is provided having a plurality of ports for coupling to system components including memory, central processing unit(s) and peripherals. A direct memory access controller (DMAC) is provided with a peripheral-independent interface coupled to the system bus and communicates with the system bus using system bus defined transactions. The DMAC comprises a set of registers. A central processing unit (CPU) configures teh DMAC by loading values into the DMAC registers. The configured DMAC issues an enable signal to a selected system component identified in the DMAC registers. A peripheral request interface is associated with the selected system components and communicates with the system bus using the system bus defined transactions. The selected system component asserts a request signal to the DMAC. In response to the request signal, the DMAC implements a DMA transfer according to the values stored in the DMAC configuration registers. Peripheral-specific signaling is provided to the system component by the peripheral request interface