The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2004
Filed:
Mar. 11, 2003
Philip C. Zuk, Portland, ME (US);
Fairchild Semiconductor Corporation, South Portland, ME (US);
Abstract
The present application and invention provides a selectively enabled bias for the pass NMOS transistor ( ) of an RF switch. Two bias supplies are selectively switched to connect to the source of the NMOS transistor ( ). The first higher bias supply turns the NMOS transistor ( ) off and the second lower bias supply turns the NMOS transistor ( ) on. The selective switch performs a single pole double throw function and may include PMOS transistors ( ) with inverse logic signals connected respective gates. Diodes may be used between the PMOS and the NMOS gate to reduce the capacitance load at the NMOS gate. The bias circuitry provides for lower capacitance values in the NMOS transistor ( ) for reducing insertion loss, and lower parasitic input to output capacitance thereby providing better isolation when the switch is off. Moreover, when the switch is on the source to substrate and the drain to substrate capacitances are decreased thereby providing better high frequency isolation.