The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2004

Filed:

Jul. 30, 1999
Applicant:
Inventors:

John Kelley, San Francisco, CA (US);

Ying-Wai Ho, Los Altos, CA (US);

Assignee:

Mips Technologies, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/38 ;
U.S. Cl.
CPC ...
G06F 7/38 ;
Abstract

Floating-point processors capable of performing multiply-add (Madd) operations and incorporating improved intermediate result handling capability. The floating-point processor includes a multiplier unit coupled to an adder unit. The intermediate result from the multiplier unit is processed (i.e., rounded) into representations that are more easily managed in the adder unit. However, some of the processing (i.e., normalization and exponent adjustment) to generate an IEEE-compliant representation is deferred to the adder unit. By combining and deferring some of the processing steps for the intermediate result, circuit complexity is reduced and operational performance is improved.


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