The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2004

Filed:

Nov. 10, 1998
Applicant:
Inventors:

Spiro Poulis, Kearns, UT (US);

John Evans, Riverton, UT (US);

Shayne Messerly, Farmington, UT (US);

Assignee:

3Com Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04M 1/00 ;
U.S. Cl.
CPC ...
H04M 1/00 ;
Abstract

The present invention provides apparatus and methods for attenuating signals received from a source over a data transmission line, having an unknown resistance, to achieve optimized signals in various data terminal and data communications equipment. In a preferred embodiment, a resistor network is operably coupled between the transmission line and a means for processing the signal, such as a digital processor, an ADC and a DAC. The resistor network comprises a termination resistor that is associated with a termination voltage, a variable resistor and another resistor. During use, a switch is operably positioned between a plurality of switch positions so that two voltage measurements will lead to the determination of the voltage of the source and the termination voltage within the resistor network. Once these voltages are known, the unknown resistance can be estimated. Thereafter, the length of the transmission line may be determined because of known resistance-per-unit-distance characteristics of the transmission line. In response to knowing this length, the digital processor selects a desired resistance value for the variable resistor so that, upon adjustment of the variable resistor by the DAC, the signal becomes a largest-possible input at the ADC.


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