The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2004
Filed:
Apr. 09, 2002
Kuno Wolf, Jungingen, DE;
Gerhard Koelle, Wiernsheim, DE;
Juergen Zaremba, Rottenburg, DE;
Wolfgang Jacob, Horb, DE;
Alexander Wallrauch, Gomeringen, DE;
Christoph Ruf, Eningen, DE;
Ralf Schmid, Kaltental, DE;
Peter Urbach, Reutlingen, DE;
Bernd Bireckoven, Buehl, DE;
Hans-Reiner Krauss, Reutlingen, DE;
Dirk Scholz, Brackenheim, DE;
Robert Bosch GmbH, Stuttgart, DE;
Abstract
Disclosed in a power semiconductor module which includes a stack of carrier substrates, disposed one above the other in multiple layers and provided with at least one conductor track on at least one main surface, in which at least one electronic semiconductor component is disposed between two adjacent carrier substrates of the stack and is contacted electrically and heat-conductively to at least one conductor track of a carrier substrate disposed in the stack above the semiconductor component and to at least one further conductor track of a carrier substrate disposed in the stack below the semiconductor component. To both improve heat output and provide a compact design, the two outer carrier substrates of the stack are embodied as one upper and one lower housing wall of a closed housing part surrounding the at least one semiconductor component, and the interstices between the stacked carrier substrates are tightly closed by an encompassing wall secured to the carrier substrates.