The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2004

Filed:

Jan. 08, 2003
Applicant:
Inventor:

Bryan Haskin, Fort Collins, CO (US);

Assignee:

Agilent Technologies, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 ;
U.S. Cl.
CPC ...
H03L 5/00 ;
Abstract

A method and apparatus for interfacing two voltage domains is presented. In one embodiment of the present invention, a method and apparatus for interfacing a high voltage domain with a low voltage domain is presented. In one embodiment of the present invention, high output signals and low output signals are generated with a level-shifter. The level-shifter is used to interface the two domains. The low output signals are generated using a low-voltage driver and a first clipping stage. The high output signals are generated using a high-voltage driver and a second clipping stage. Duty-cycle distortion is lowered or eliminated by using an accelerator to accelerate the transition between the high output signals and the low output signals. Bias signals are input into the first and second stage. The bias signals work in a coordinated manner, to constrain the minimum and maximum outputs of various components in the level-shifter.


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