The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2004

Filed:

Mar. 28, 2002
Applicant:
Inventors:

Hoe-ju Chung, Suwon, KR;

Kyu-hyoun Kim, Suwon, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

A semiconductor device having a plurality of output signals is provided. The semiconductor device includes a plurality of PMOS transistors each having a drain of connected to a predetermined node and a source supplied with a first power voltage. A plurality of first buffers are connected to the gates of the plurality of PMOS transistors. A plurality of NMOS transistors each have a drain connected to the predetermined node, and a source supplied with a first ground voltage. A plurality of second buffers are connected to gates of the plurality of NMOS transistors. The plurality of first buffers are supplied with the first ground voltage, the plurality of second buffers are supplied with the first power voltage, and a signal output from a previous portion of the semiconductor device is input into the first and second buffers at predetermined time intervals. As a result, skewing of the output signals is reduced.


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