The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6693462 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 17, 2004

Filed:

May. 03, 2002
Applicant:
Inventors:

Lei Wang, Sunnyvale, CA (US);

Qiang Li, Fremont, CA (US);

Assignee:

Piconetics, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/9096 ; H03K 1/920 ;
U.S. Cl.
CPC ...
H03K 1/9096 ; H03K 1/920 ;
Abstract

A logic circuit for evaluating a logic function while a signal on a clock input is a logic high. The logic circuit pre-discharges an output node to the logic low of the signal on the clock input and then charges the output node to logic high from the clock input when the logic function of the input is such as to require the output node to change state. The pre-discharge path is an n-channel transistor that is conductive only when the signal on the clock input is low. Also disclosed is a logic circuit that evaluates a logic function while a signal on the clock input is a logic high and while the signal on the clock input is a logic low, thereby permitting logic evaluations on both phases of the signal on the clock input.


Find Patent Forward Citations

Wang, Lei. (2004). Low power dynamic logic gate with full voltage swing and two phase operation (U.S. Patent No. 6693462). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6693462

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