The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2004
Filed:
Oct. 10, 2001
Richard M. Biron, Melbourne, FL (US);
Mack Technologies Florida, Inc., West Melbourne, FL (US);
Abstract
A method for forming electrical interconnects for printed circuit boards and the like includes the steps of laminating a first surface of a rigid dielectric substrate with a first conductive laminate such that the first conductive laminate extends beyond at least one edge of the dielectric substrate, patterning the first conductive laminate to define a plurality of electrical interconnects which extend beyond the edge(s) of the dielectric substrate, forming a plurality of conductive traces on a second surface of the dielectric substrate and forming a plurality of openings in the dielectric substrate, each opening extending from a first location on the first surface of the dielectric which is proximate at least one electrical interconnect to a second location on the second surface of the substrate which is proximate at least one conductive trace. Conductive material is formed within the openings of the dielectric substrate such that the conductive material facilitates electrical communication between the electrical interconnects and the conductive traces. The electrical interconnects may be formed so as to either provide electrical communication between a plurality of printed circuit boards or so as to define terminations for such printed circuit boards.