The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2004

Filed:

Mar. 21, 2001
Applicant:
Inventor:

Yuzi Kanazawa, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 ;
U.S. Cl.
CPC ...
G06F 9/455 ;
Abstract

After a provisional layout in a sub-module of a semiconductor integrated circuit is performed, a path optimizing inter-sub-modules process is executed, and the layout and wiring among sub-modules are performed. If any part of the wiring among sub-modules does not satisfy a specified delay restriction, a provisional-layout correction process is executed to correct the provisional layout of cells in a sub-module. These processes are repeated, and then an entire layout of cells is determined.


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