Shielded planar dielectrically isolated high speed pin photodiode and method for producing same

Abstract

A PIN photodiode and method for forming the PIN photodiode are shown where an intrinsic layer of the photodiode can be made arbitrarily thin and a second active region of the photodiode substantially shields a first active region of the photodiode. A fabrication substrate is lightly doped in order to form the intrinsic layer of the photodiode. A void is formed in a first surface of the fabrication substrate and a first active region of the photodiode having a first conductivity type is formed in the void. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication substrate is then lapped to a obtain a preselected thickness of the intrinsic layer. A depth of the void is selected such that a portion of the first active region is exposed at the second surface of the fabrication substrate after lapping. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate. The second active region may be formed such that it substantially surrounds the exposed portion of the first active region. A low resistance contact to the exposed portion of the first active region is formed, where the area of contact is small. Also, dummy differential contact can be formed on the topside of the photodiode adjacent to the low resistance contact for use with a differential input receiver circuit. Further, separate second active regions may be formed, with separate contacts and one of the regions covered by an opaque layer, to obtain a differential photodiode.