Semiconductor device with negative differential resistance characteristics

Abstract

A gate oxide film formed on the surface of a silicon substrate is partly reduced in thickness or “thinned” at its specified part overlying a source region. In a gate region, a multilayer structure is formed which includes a first polycrystalline silicon or “polysilicon” film of a p-type conductivity, a tunnel oxide film, and a second p-type polysilicon film in this order of lamination. The source region and the first polysilicon film make up a high-concentration impurity-doped pn junction with a thin silicon oxide film laid therebetween, providing a tunnel diode also known as Esaki diode. The diode is used for a negative differential resistance. Further, a portion between the first and second polysilicon films is a non-linear tunnel resistor, which serves as a load. The negative differential resistance and the load are serially connected together between a low-voltage power supply (ground potential) Vss and a high-voltage power supply Vdd, thus enabling forming a transistor with a built-in bistable circuit. Potential information of the first polysilicon film for use as a data storage node is read with a transistor amplification applied thereto. Thus, data read is performed at high speeds. Simultaneously, a current flowing between the power supplies is suppressed to a lower level, thereby minimizing power consumption in wait modes.