The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2004
Filed:
May. 27, 1999
Applicant:
Inventors:
You-Ming Chiu, Hsinchuang, TW;
Jiin Lai, Taipei, TW;
Jyhfong Lin, Taipei, TW;
Hsin-Chieh Lin, Taipei, TW;
Wei-Yu Wang, Taipei, TW;
Assignee:
Via Technologies, Inc., Taipei Hsien, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 ;
U.S. Cl.
CPC ...
H03D 3/24 ;
Abstract
A phase lock loop (PLL) clock generator with programmable frequency and skew is provided in the present invention, in which frequency of clock signals generated can be dynamically changed and skew of the clock signals generated can be dynamically adjusted by a computer program. Also, the signal skew due to the change of loading can be compensated. Therefore, the PLL clock generator based on a closed-loop configuration can better control the skew of clock signals to provide higher stability and durability to the system.