The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2004

Filed:

Aug. 25, 2000
Applicant:
Inventors:

Kouichirou Hara, Osaka, JP;

Yasuo Murakami, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/06 ;
U.S. Cl.
CPC ...
H04N 5/06 ;
Abstract

An object is to eliminate the effect of jitter in a sampling clock to realize proper sampling of a video signal. An A/D converter ( ) samples a video signal in synchronization with a sampling clock (VCLK) at a rate of a period which is ½ times the video period. The phase of the sampling clock (VCLK) is corrected in a phase correcting circuit ( ). The sampled signals are held alternately as data (DL) and (DR) in two latches ( ) ( ). A data switching portion ( ) selects output signals from one of the two latches ( ) and ( ). A calculating portion ( ) calculates an absolute difference value (&Dgr;D) between the data (DL) and (DR) in each video period. A calculating portion ( ) calculates a maximum value (Dmax) among the absolute difference values (&Dgr;D) in one frame. A phrase control portion ( ) controls the phase correcting circuit ( ) and the data switching portion ( ) so that a video signal processing circuit ( ) can receive sampled signals which are sampled signals which are sampled at a phase corresponding to the center of a rising transition which the maximum value (Dmax) makes as the phase varies.


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