The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2004

Filed:

Mar. 06, 2001
Applicant:
Inventor:

Amos Noy, Jerusalem, IL;

Assignee:

Verisity Ltd., Rosh Ha'ayin, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/128 ; G01F 1/100 ; G06F 9/45 ;
U.S. Cl.
CPC ...
G01R 3/128 ; G01F 1/100 ; G06F 9/45 ;
Abstract

A system and method for testing the quality of a simulation model for the DUT (device under test) with dynamic constraint solving and test generation for the testing and verification process. The present invention provides such dynamic constraint solving through the creation of a sequence of instructions in a “generator mini-language” (GML). These instructions are then executed in order to provide a correct random solution to any given set of dynamic constraints. The process of execution is preferably performed by a constraint resolution engine, optionally and more preferably implemented as software, which manages the requirements imposed by the constraints on the execution, while simultaneously enabling a random solution to the set of constraints to be provided. Such a constraint resolution engine may optionally be viewed as a type of state machine, in which individual elements of the state machine are more preferably represented by one or more dynamic graph(s).


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