The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2004

Filed:

Dec. 22, 2000
Applicant:
Inventors:

James T. Theodoras, II, Plano, TX (US);

Andrew J. Thurston, Allen, TX (US);

Daniel L. Chaplin, Murphy, TX (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 3/128 ;
U.S. Cl.
CPC ...
G01R 3/128 ;
Abstract

A method for testing a signal path for mark ratio tolerance includes generating a varying test pattern by selecting between a first pattern and a second pattern according to a defined sequence; and sending the varying test pattern over the signal path. An apparatus disposed in a communication system includes a selection circuit for generating a varying test pattern to send over the signal path, the selection circuit generating the varying test pattern by selecting between a first pattern and a second pattern according to a select sequence signal, and a sequencer coupled to the selection circuit, the sequencer providing the select sequence signal to the selection circuit, the sequencer generating the select sequence signal according to a mode value. The mark ratio tolerance of a system can be tested, varying the data density of one portion of the signal path while maintaining a constant data density on another portion of the signal path.


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