The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2004
Filed:
Feb. 21, 2002
Jian Wei, San Diego, CA (US);
Inyup Kang, San Diego, CA (US);
Julio Arceo, San Diego, CA (US);
Jalal Husseini, San Diego, CA (US);
Tao Li, San Diego, CA (US);
Bruce Meagher, San Diego, CA (US);
Richard Higgins, San Diego, CA (US);
Moto Oishi, San Diego, CA (US);
Brian Rodrigues, San Diego, CA (US);
QUALCOMM, Incorporated, San Diego, CA (US);
Abstract
Memory architectures and techniques that support direct memory swapping between NAND Flash and SRAM with error correction coding (ECC). In a specific design, a memory architecture includes a first storage unit (e.g., an SRAM) operative to provide storage of data, a second storage unit (e.g., a NAND Flash) operative to provide (mass) storage of data, an EMI unit implemented within an ASIC and operative to provide control signals for the storage units, and a data bus coupled to both storage units and the EMI unit. The two storage units are implemented external to the ASIC, and each storage unit is operable to store data from the other storage unit via the data bus when the other storage unit is being accessed by the EMI unit. The EMI unit may include an ECC unit operative to perform block coding of data transferred to/from the second storage unit.