The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2004

Filed:

Jan. 18, 2001
Applicant:
Inventor:

Carlo Dallavalle, Cimercate, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/104 ;
U.S. Cl.
CPC ...
G01R 3/104 ;
Abstract

Testing a CMOS integrated circuit includes establishing a current threshold value, powering the integrated circuit in static and idle conditions, measuring the current absorbed by the integrated circuit and comparing this with the threshold value and accepting or rejecting the integrated circuit if the comparison shows that the current absorbed measured is respectively lower or higher than the threshold value. To improve discrimination between non-faulty and faulty devices, the threshold value is obtained by forming two measurement transistors in the integrated circuit, one n channel and the other p channel, biasing these in the cut-off zone and measuring their sub-threshold currents. Also, the method includes calculating the sub-threshold currents by channel unit of area of the transistors of the integrated circuit using the sub-threshold currents measured and the channel areas of the measurement transistors, obtaining the sum of the channel areas of the transistors that are cut off when the integrated circuit is idle in static conditions, and calculating the current absorbed by the integrated circuit when idle in static conditions using the result of the two operations described above and adding a pre-established current increase to the current absorbed to obtain the threshold value.


Find Patent Forward Citations

Dallavalle, Carlo. (2004). Method for testing a cmos integrated circuit (U.S. Patent No. 6681193). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6681193

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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