The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2004
Filed:
Mar. 17, 2000
Masaaki Maeda, Tokyo, JP;
Yoshikazu Fujita, Tokyo, JP;
Oki Electric Industry Co., Ltd., Tokyo, JP;
Abstract
For enabling a stable clock signal to be extracted from even an input signal of which the duty factor is made worse, there is presented a clock extraction circuit applicable to an optical signal receiver equipped in an apparatus for use in the optical data communication. The clock extraction circuit includes a rising edge differential circuit ( ) for differentiating the input signal at the rising edge thereof, a first monostable multivibrator ( ) for processing the output from the differential circuit ( ), a second monostable multivibrator ( ) for processing the output from the first monostable multivibrator ( ), an OR gate ( ) for carrying out the logical OR between the output signals from the first and second monostable multivibrators ( ) and ( ) and circuitry for variably varying output pulse width, which processes the result of the logical OR. With this configuration, it is made possible to extract a stable clock signal from an input signal even when the duty factor of the input signal is made worse.