The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2004

Filed:

May. 18, 1999
Applicant:
Inventors:

Kyu Ho Park, Taejon, KR;

Jong Hyuk Choi, Seoul, KR;

Bong Wan Kim, Cheju-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/240 ; G06F 1/300 ; G06F 1/580 ;
U.S. Cl.
CPC ...
H04L 1/240 ; G06F 1/300 ; G06F 1/580 ;
Abstract

A router, which is basically a point-to-point communication router, is devised for the BUS-like communication between processors. Therefore, it is named as 'Virtual Bus'. One processor is connected to one router and the router can be connected in one dimensional array or two dimensional arrays. In case of two dimensional arrays, there are row and column router controllers. The method of communication consists of two phases: Firstly, the path between source processor and destination processor by sending set-up message. Secondly, messages are transferred without intervention of the intermediate routers between the source and destination processors. The idea is that the intermediate routers are set up to by-passing mode at the set-up phase. That is the routers in by-passing mode just relay the incoming messages to their output ports without any interruption. Therefore the virtual bus can guarantee high speed communication between processors. This method is equally applied to the two or more dimensional arrays.


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