Self calibrating digital delay-locked loop

Abstract

Disclosed is a method for calibrating a delay-locked loop containing a chain of delay line elements that propagate a reference clock from delay line element to delay line element. Also disclosed is a delay-locked loop that operates in accordance with the method. The method includes, during a calibration procedure, sequentially varying the configuration of the chain of delay line elements so that there is one unused delay line element and a plurality of used delay line elements and, for each configuration, electrically compensating at least one delay line element based on a phase comparison results obtained from previous calibration configurations of the delay line elements so as to set the total delay through the chain of delay line elements at a desired value. The phase comparison is made between the reference clock and the propagated reference clock. Varying the configuration of the chain of delay line elements is accomplished in the preferred embodiment by changing the start and end of the chain of delay line elements