The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2004
Filed:
Dec. 20, 1999
Carl R. Stevenson, Macungie, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A cost-effective continuous phase logic-based modulator and demodulator are provided to allow communications using binary frequency shift keying (BFSK) as well as M-ary FSK techniques. The modulator of the 1-bit precision modem architecture is based on a 1-bit precision numerically controlled oscillator (NCO), which provides complete programmability with respect to a frequency of the 1-bit precision logic-based modulator and/or demodulator. The 1-bit precision NCO includes an adder and a phase accumulator register which is clocked by a master clock signal. A two-input multiplexer has a single bit symbol value to generate BFSK, or larger input multiplexers can be implemented to provide M-ary FSK. The output of the 1-bit precision NCO is upconverted to an intermediate frequency using a simple logic function, i.e., XNOR logic. Alternatively, the intermediate frequency may be arrived at without the need for upconversion by directly utilizing a harmonic alias at a desired IF frequency. The undesirable portion of the upconverted signal may be suppressed using I/Q image rejection, and/or an appropriate bandpass filter may be used. A band limited, hard limited signal at the high IF is presented to the 1-bit precision demodulator as a receive IF signal, which is treated as a 1-bit quantization of the signal. The receive IF signal is digitally down-converted to a low IF signal to produce an alias signal at the low IF frequency. In the case where a sub-sampler in the 1-bit precision demodulator is not capable of operating at a required frequency (e.g., above 100 MHz or so), a harmonic sub-sampling mixer may be employed, with the resulting low IF signals being hard limited and lowpass filtered directly to the desired low IF. The received symbols are correlated with expected local frequencies representing a mark and a space. The correlation is integrated in an oversampled manner relative to the symbol interval. A decision is made as to which symbol was received using, e.g., a magnitude comparator.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile