The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2004
Filed:
Aug. 09, 2002
Arnd R. Scholz, Dresden, DE;
Klaus M. Hummler, Poughkeepsie, NY (US);
Infineon Technologies AG, Munich, DK;
Abstract
A gate electrode contact spacer ( ) for a vertical DRAM device ( ) and a method for forming the same. Memory cells ( ) are formed within deep trenches ( ) of a workpiece ( ). A temporary spacer adjacent gate electrode contacts ( ) and pad nitride layer are removed. A spacer material is deposited over exposed portions of the workpiece ( ) and over the top and sides of the gate electrode contacts ( ). The spacer material is removed from the horizontal surfaces of the DRAM device ( ), including the exposed portions of the workpiece ( ) and the top of the gate electrode contacts ( ). Spacers ( ) having sidewalls sloping downwardly away from the gate electrode contacts ( ) are left remaining on the gate electrode contact ( ) sides, preventing voids from forming during a subsequent array top oxide deposition. Spacers may also be formed adjacent top regions of isolation trenches simultaneously with the formation of spacers ( ).