The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2003
Filed:
Jun. 26, 2001
Myson-Century, Inc., , TW;
Abstract
A single-ended high-voltage level shifter for a TFT-LCD gate driver comprises a high-voltage power supply and a low-voltage power supply, a low-voltage NMOS transistor, a high-voltage NMOS transistor, and a high-voltage PMOS transistor. An input signal is applied at the gate of the low-voltage NMOS transistor. The source of the low-voltage NMOS transistor is connected to the low-voltage power supply. The source of the high-voltage NMOS transistor is connected to the drain of the low-voltage NMOS transistor. The high-voltage NMOS transistor has a first reference voltage applied at its gate. The level of the first reference voltage is between the input-signal level and the high-voltage power supply. The drain of the high-voltage PMOS transistor is connected to the drain of the high-voltage NMOS transistor. The source of the high-voltage PMOS transistor is connected to the high-voltage power supply. The high-voltage PMOS transistor has a second reference voltage applied at its gate. The second reference voltage keeps the high-voltage PMOS transistor in ON-state and is at a level higher than the first reference voltage. The drain of the high-voltage PMOS transistor is employed as the output end connected to an output buffer of the next stage.