The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2003

Filed:

Feb. 05, 2002
Applicant:
Inventor:

Yasuaki Sumi, Tottori, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 ;
U.S. Cl.
CPC ...
H03L 7/00 ;
Abstract

In a PLL device with a plurality of phase comparators, when one phase comparator has reached a locked state, this phase comparator is allowed to keep on delivering an output, while outputs of the other phase comparators are disabled. Accordingly, power consumption can be reduced. Furthermore, an error current output from a charge pump ( ) connected to the phase comparators to output an error signal is reduced when lock approaches. Accordingly, lock failure can be avoided. Furthermore, a time constant of a low-pass filter ( ) that receives the output of the charge pumps connected to the phase comparators is altered following alteration of the number of the phase comparators ( to ) that deliver their outputs. Accordingly, power consumption can be reduced, and also stability and converging speed are improved. Using distribution means ( ) instead of frequency dividers provided for the phase comparators individually makes LSI implementation easy.


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