The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2003

Filed:

Oct. 31, 2001
Applicant:
Inventors:

Nader Fakhry, Fort Collins, CO (US);

Viswanathan Lakshmanan, Westminster, CO (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A method of translating a register transfer level code model includes receiving as inputs a user defined primitives map file, a truth table map file, a gate primitives map file, a register transfer level description file of a library cell, a standard delay format file, and a pin order information file for the register transfer level code model; creating data structures for a VITAL model; parsing at least one of the user defined primitives map file, the truth table map file, the gate primitives map file, the register transfer level description file, and the standard delay format file to generate an equivalent VITAL model in the data structures created for the VITAL model wherein the VITAL model is functionally equivalent to the register transfer level code model; and generating as output a VITAL model file from the data structures created for the VITAL model.


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