The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2003
Filed:
Mar. 12, 2003
Michael G. Ennis, Evanston, IL (US);
Raymond P. O'Leary, Evanston, IL (US);
Joseph W. Ruta, Arlington Heights, IL (US);
S&C Electric Co., Chicago, IL (US);
Abstract
A control arrangement and method is provided for detecting and responding to disturbances in electrical power systems. In a preferred arrangement, an integration is initiated that is based on a comparison of actual voltage of a source and a reference voltage. When the integration exceeds a predetermined value, the source is considered unreliable. Also in a preferred arrangement, a determination is made as to whether or not the disturbance is a downstream fault condition. For example, this is useful for applications where a transfer is made from a first source to a second source when predetermined disturbances are detected. In this manner, the transfer of the load to a second source is avoided which would continue the supply of the downstream fault. Additionally, the arrangement distinguishes between various degrees of disturbances to permit appropriate response based on the severity and type of disturbance. For example, a first immediate response, i.e. without intentional delay, is provided for more severe disturbances while a second delayed response is provided for less severe disturbances. The control arrangements transfers the load to an alternate source of power via the use of a high-speed source-transfer switching system that both avoids undesirable current flow between sources and minimizes undesirable transfer delays.